Combinational Logic Gate Simulation
Circuit Designer
Preset Circuits
Circuit Designer
Circuit Components
Circuit Definition
Pattern Generator
Universal Pattern Generator
ⓘ
For pulse pattern: how many 1s to insert
ⓘ
For pulse pattern: when to start the pulse
ⓘ
Value to fill outside the specified range
Input Patterns
Circuit Visualization
Preset Circuits
SR Latch
D Flip-Flop
T Flip-Flop
JK Flip-Flop
JK Flip-Flop 0 delay(invalid)
Full Adder
1-bit Register
4-bit Counter
4-bit Shift Register
Circuit Definition
Simulation Results
(Run simulation to see results)